As elements for peripheral circuit of a nonvolatile semiconductor memory device, an N-type MOS (Metal-Oxide-Semiconductor) transistor (which will be referred to as an NMOS transistor, hereinafter) and a P-type MOS transistor (which will be referred to as a PMOS transistor, hereinafter), each of which employs an N-type poly-silicon film as a gate electrode, are used in some cases. In such cases, the threshold voltage of each of these transistors is adjusted by ion implantation of boron (B) into the channel region.
In the transistors having this structure, it is known that, if the channel width is reduced, the threshold voltage of an NMOS transistor is reduced, and the threshold voltage of a PMOS transistor is increased. Because of this channel width dependence in the threshold voltages, the variation of transistor characteristics increase, particularly when they have a small channel width.